View AD5338BRMZ-1_2733354.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

2.5 v to 5.5 v, 250 a, 2-wire interface dual-voltage output, 8-/10-/12-bit dacs ad5337/ad5338/ad5339 rev. a in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features ad53 37 2 buffere d 8 - bit dacs in 8 - lea d mso p ad53 38, a d 53 38-1 2 buffere d 1 0 - b it dacs in 8- le ad msop ad53 39 2 buffere d 1 2 - b it dacs in 8- le ad msop low power ope r ation: 250 ma @ 3 v, 3 00 ma @ 5 v 2-wire (i 2 c ? compatible) seria l interface 2.5 v to 5.5 v p o wer supply guarantee d m o notonic by de sign over all codes power-down to 80 na @ 3 v, 2 00 na @ 5 v 3 power-down modes do uble-buffer e d input lo gic output range: 0 v to v re f power-on reset to 0 v simultaneo us update o f o u tp uts ( ldac function) software clear facility data readback facility on-chip rail-to-rail output buff er amplifiers temperature r a nge ?40 c to +105 c applic ati o ns portable batter y -powered inst ruments digital gain and offset adjustment programmable voltage an d current sources programmable attenuators industrial process control general description ad5337/ad53 38/ad5339 a r e d u al 8-, 10-, and 12-b i t b u f f er ed vol t a g e o u t p u t d a cs i n an 8-le ad msop p a ck age, w h ich o p era t e f r o m a s i n g le 2.5 v t o 5.5 v s u p p l y , co n s umin g 250 a a t 3 v . o n -chi p o u t p ut a m pl if iers a l lo w ra i l -t o- ra i l o u t p ut sw ing wi th a s l ew ra t e o f 0.7 v/s. a 2 - wir e s e r i al in t e r f ace o p era t es a t c l o c k ra t e s u p to 400 kh z. this in t e r f ace is s m b u s-co m p a t i b le at v dd < 3.6 v . m u l t i p le de vices ca n be place d o n t h e s a m e b u s . the r e fer e n c es fo r t h e tw o d a c s a r e der i v e d f r o m o n e r e fer e n c e p i n. t h e o u t p u t s o f a l l d a cs m a y b e u p da te d s i m u l t an e o usly usin g the s o f t wa r e ld a c f u n c t i o n . t h e p a rt s i n c o rpo r a t e a p o we r - o n re s e t c i rc u i t t h a t e n su re s t h a t t h e d a c output s p o we r u p to 0 v a nd r e ma in t h er e un t i l a va li d wr i t e to t h e de vi ce tak e s p l a c e . a so ft w a r e c l ea r fun c ti o n r e se t s all i n p u t a n d d a c r e g i s t ers t o 0 v . a p o w e r - do w n fe a t ur e r e d u ces t h e c u r r en t co n s um p t io n o f th e de vices t o 2 00 na @ 5 v (8 0 na @ 3 v). the lo w p o w e r co n s um p t io n o f t h es e p a r t s in no r m al o p era t ion m a k e s th e m i d ea l l y s u i t ed t o po rt a b l e b a t t e r y - o p e r a t ed eq ui p m en t. th e p o w e r co n s u m p t io n is typ i cal l y 1.5 mw a t 5 v a nd 0.75 mw a t 3 v , r e d u cin g to 1 w in p o w e r - do wn mo de . func ti onal bl oc k di a g ram scl interface logic input register v out a buffer dac register string dac a v dd refin input register v out b buffer dac register power-on reset power-down logic ldac string dac b a0 sda gnd ad5337 / ad5338 / ad5339 03756-a - 001 fi g u r e 1 .
ad5337/ad5338/ad5339 rev. a | page 2 of 24 table of contents specifications ..................................................................................... 3 ac characteristics ........................................................................ 5 timing characteristics ................................................................ 6 absolute maximum ratings ............................................................ 7 esd caution .................................................................................. 7 pin configuration and function descriptions ............................. 8 ter mi nolo g y ...................................................................................... 9 typical performance characteristics ........................................... 11 functional description .................................................................. 15 digital-to-analog converter section ...................................... 15 resistor string ............................................................................. 15 dac reference inputs ............................................................... 15 output amplifier ........................................................................ 15 power-on reset ........................................................................... 15 serial interface ............................................................................ 15 write operation .......................................................................... 17 read operation ........................................................................... 18 double-buffered interface ........................................................ 19 power-down modes .................................................................. 19 applications ..................................................................................... 20 typical application circuit ....................................................... 20 bipolar operation ....................................................................... 20 multiple devices on one bus ................................................... 20 product as a digitally programmable window detector ..... 21 coarse and fine adjustment capabilities ............................... 21 power supply decoupling ......................................................... 21 outline dimensions ....................................................................... 24 ordering guide .......................................................................... 24 revision history 10/04changed data sheet from rev. 0 to rev. a updated format..................................................................universal added ad5338-1................................................................universal changes to specifications ................................................................ 4 updated outline dimensions ....................................................... 24 changes to ordering guide .......................................................... 24 11/03rev. 0: initial version
ad5337/ad5338/ad5339 rev. a | page 3 of 24 specifications v dd = 2.5 v to 5.5 v; v ref = 2 v; r l = 2 k? to gnd; c l = 200 pf to gnd; all specifications t min to t max , unless otherwise noted. table 1. grade a grade b parameter 1 min typ max min typ max unit b version 2 conditions/comments dc performance 3 , 4 ad5337 resolution 8 8 bits relative accuracy 0.15 1 0.15 0.5 lsb differential nonlinearity 0.02 0.25 0.02 0.25 lsb guaranteed monotonic by design over all codes ad5338 resolution 10 10 bits relative accuracy 0.5 4 0.5 2 lsb differential nonlinearity 0.05 0.5 0.05 0.50 lsb guaranteed monotonic by design over all codes ad5339 resolution 12 12 bits relative accuracy 2 16 2 8 lsb differential nonlinearity 0.2 1 0.2 1 lsb guaranteed monotonic by design over all codes offset error 0.4 3 0.4 3 % of fsr gain error 0.15 1 0.15 1 % of fsr lower deadband 20 60 20 60 mv lower deadband exists only if offset error is negative offset error drift 5 ?12 ?12 ppm of fsr/c gain error drift 5 ?5 ?5 ppm of fsr/c power supply rejection ratio 5 ?60 ?60 db ?v dd = 10% dc crosstalk 5 200 200 v r l = 2 k? to gnd or v dd dac reference inputs 5 v ref input range 0.25 v dd 0.25 v dd v v ref input impedance 37 45 37 45 k? normal operation >10 >10 m? power-down mode reference feedthrough ?90 ?90 db frequency = 10 khz output characteristics 5 minimum output voltage 6 0.001 0.001 v this is a measure of the minimum and maximum drive capabilities of the output amplifier. maximum output voltage 6 v dd ? 0.001 v dd ? 0.001 v dc output impedance 0.5 0.5 ? short circuit current 25 25 ma v dd = 5 v 16 16 ma v dd = 3 v power-up time 2.5 2.5 s coming out of power-down mode. v dd = 5 v 5 5 s coming out of power-down mode. v dd = 3 v
ad5337/ad5338/ad5339 rev. a | page 4 of 24 grade a grade b parameter 1 min typ max min typ max unit b version 2 conditions/comments logic inputs (a0) 5 input current 1 1 a v il , input low voltage 0.8 0.8 v v dd = 5 v 10% 0.6 0.6 v v dd = 3 v 10% 0.5 0.5 v v dd = 2.5 v v ih , input high voltage 2.4 2.4 v v dd = 5 v 10% 2.1 2.1 v v dd = 3 v 10% 2.0 2.0 v v dd = 2.5 v pin capacitance 3 3 pf logic inputs (scl, sda) 5 v ih , input high voltage 0.7 v dd v dd + 0.3 0.7 v dd v dd + 0.3 v smbus-compatible at v dd < 3.6 v v il , input low voltage ?0.3 +0.3 v dd C0.3 +0.3 v dd v smbus-compatible at v dd < 3.6 v i in , input leakage current 1 1 a v hyst , input hysteresis 0.05 v dd 0.05 v dd v c in , input capacitance 8 8 pf glitch rejection 50 50 ns input filtering suppresses noise spikes of less than 50 ns logic output (sda) 5 v ol, output low voltage 0.4 0.4 v i sink = 3 ma 0.6 0.6 v i sink = 6 ma three-state leakage current 1 1 a three-state output capacitance 8 8 pf power requirements v dd 2.5 5.5 2.5 5.5 v i dd (normal mode) 7 v ih = v dd and v il = gnd v dd = 4.5 v to 5.5 v 300 375 300 375 a v dd = 2.5 v to 3.6 v 250 350 250 350 a i dd (power-down mode) v ih = v dd and v il = gnd v dd = 4.5 v to 5.5 v 0.2 1.0 0.2 1.0 a i dd = 4 a (max) during 0 readback on sda v dd = 2.5 v to 3.6 v 0.08 1.00 0.08 1.00 a i dd = 1.5 a (max) during 0 readback on sda 1 for explanations of the specific pa rameters, see the termin section. ology 2 temperature range: (a and b versions ): ?40c to +105c; typical at 25c. 3 dc specifications tested with the outputs unloaded. 4 linearity is tested using a reduced code range: ad5337 (c odes 8 to 248); ad5338, ad5338-1 (c odes 28 to 995); ad5339 (codes 115 to 3981). 5 guaranteed by design and characterization; not production tested. 6 for the amplifier output to reach its minimum voltage, offset e rror must be negative; to reach its maximum voltage, v ref = v dd and offset plus gain error must be positive. 7 i dd specification is valid for all dac codes. interface in active. all dacs active an d excluding load currents.
ad5337/ad5338/ad5339 rev. a | page 5 of 24 ac characteristics 1 v dd = 2.5 v to 5.5 v; r l = 2 k? to gnd; c l = 200 pf to gnd; all specifications t min to t max , unless otherwise noted. table 2. a and b versions 2 parameter 3 min typ max unit conditions/comments output voltage settling time v ref = v dd = 5 v ad5337 6 8 s 1/4 scale to 3/4 scale change (0x40 to 0xc0) ad5338 7 9 s 1/4 scale to 3/4 scale change (0x100 to 0x300) ad5339 8 10 s 1/4 scale to 3/4 scale change (0x400 to 0xc00) slew rate 0.7 v/s major-code transition glitch energy 12 nv-s 1 lsb change around major carry digital feedthrough 1 nv-s digital crosstalk 1 nv-s dac-to-dac crosstalk 3 nv-s multiplying bandwidth 200 khz v ref = 2 v 0.1 v p-p total harmonic distortion ?70 db v ref = 2.5 v 0.1 v p-p. frequency = 10 khz 1 guaranteed by design and characterization; not production tested. 2 temperature range: a and b versions : ?40c to +105c; typical at 25c. 3 for explanations of the specific pa rameters, see the termin section. ology
ad5337/ad5338/ad 5339 r e v. a | pa ge 6 o f 2 4 timing char a c teristics v dd = 2.5 v t o 5.5 v . al l s p ecif ic a t io n s t min to t max , u n l e ss ot he r w i s e note d. table 3. parameter limit at t min , t ma x (a and b versio ns) u n i t c o n d i t i o n s / c o m m e n t s f scl 400 khz max scl clock frequ e ncy t 1 2.5 s min scl cycle time t 2 0 . 6 s m i n t high , scl high time t 3 1 . 3 s m i n t low , scl low time t 4 0 . 6 s m i n t hd, st a , start/rep e ated start condition hold time t 5 1 0 0 n s m i n t su , dat , data setu p time t 6 1 0 . 9 s m a x t hd, dat , data hold time 0 s m i n t hd, dat , data hold time t 7 0 . 6 s m i n t su , st a , setup tim e for repeated start t 8 0 . 6 s m i n t su , st o , stop con d ition setup time t 9 1 . 3 s m i n t bu f , bus free time between a sto p and a start co ndition t 10 3 0 0 n s m a x t r , rise time of scl and sda when receiving 0 n s m i n t r , rise time of scl and sda wh en receiving (c mos-compatible) t 11 2 5 0 n s m a x t f , fall time of sda when transmitting 0 n s m i n t f , fall time of sda when receivi n g (cmos-compatible) 300 n s m a x t f , fall time of scl and sda when receiving 20 + 0.1 c b 2 ns min t f , fall time of scl and sda when transmitting c b 400 pf max capacitive load for each bus li ne 1 a master device must provide a hold t ime of at least 300 ns fo r the sda signal (r eferred to v ih m i n of t h e s c l si gn a l) i n order t o bri d ge t h e un de fi n e d regi o n of scl s fa lli n g edg e . 2 c b is the to tal capa citance o f o n e bus line in pf; t r and t f meas ured b e tween 0.3 v dd and 0.7 v dd . st o p scl s da st a r t co ndi t i o n t 9 t 3 t 4 t 6 t 2 t 5 t 7 t 8 t 1 t 4 t 11 t 10 r epea t e d st a r t co ndi t i o n co nd i t i o n 03756-a - 002 f i g u re 2. 2- wire s e r i a l int e r f a c e ti m i ng d i ag r a m
ad5337/ad5338/ad 5339 r e v. a | pa ge 7 o f 2 4 absolute maximum ra tings t a = 2 5 c , u n l e ss ot he r w i s e no t e d. table 4. p a r a m e t e r r a t i n g v dd to gnd ?0.3 v to +7 v scl, sda to g n d ?0.3 v to v dd + 0.3 v a0 to gnd ?0.3 v to v dd + 0.3 v reference input voltage to gnd ?0.3 v to v dd + 0.3 v v ou t a?v ou t b to gnd ?0.3 v to v dd + 0.3 v operating tem p erature range industrial (b versio n) ?40c to +105c storage temperature range ?65c to +150c j u nction temperature (t j max) 150c msop package power dissi pati on ( t j max ? t a ) ja ja thermal impedance 206c/w jc thermal imp e dance 44c/w reflow soldering peak temperature 220 +5/?0c time at peak te mperature 10 s to 40 s s t r e s s es a b o v e t h os e list e d u nde r a b s o l u te m a xim u m r a t i n g s ma y ca us e p e r m a n e n t dama ge to t h e de vi ce. t h is is a st r e ss r a t i ng on ly , an d f u nc t i on a l op e r a t i o n of t h e d e v i c e a t t h e s e or a n y o t h e r con d i t io n s ab o v e t h o s e i ndic a t e d i n t h e op era t io nal s e c t io n o f t h is sp e c if ic a t io n is no t im pl ie d . e x p o sur e t o a b s o l u te max i m u m r a t i ng co ndi t i on s fo r ex tende d p e r i o d s ma y a f fe c t de vice rel i a b i l i t y . t r a n sien t c u r r en ts o f u p t o 100 ma do n o t ca us e scr l a t c h-u p . esd c a ution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity.
ad5337/ad5338/ad 5339 r e v. a | pa ge 8 o f 2 4 pin conf igura t ion and fu nction descriptions v dd v out a gnd sda scl v ou t b refin a0 top view (not to scale) 8 7 6 5 1 2 3 4 ad5337 / ad5338 / ad5339 03756-a - 003 f i gure 3. pin config ur ation ta ble 5. pi n f u nct i on d e s c ri pt i o ns pin no. mnemonic function 1 v dd power supply in put. t h ese parts can be oper a te d from 2.5 v to 5 . 5 v, and the su pply shou ld be d e coupled to gnd. 2 v ou t a buffered analog output voltage from dac a. th e output amplifier has rai l -to-rail operation. 3 v ou t b buffered analog output voltage from dac b. th e output amplifier has rai l -to-rail operation. 4 refin reference input pin for the two dacs . it has an input range from 0.25 v to v dd . 5 gnd ground reference point for all circuitry on the parts. 6 s d a serial data line. this is used in conj unction with the scl line to cl ock data into or out of the 16- bit input shift register. it is a bidirectional ope n -drain data lin e that should be pulled to the supply with an e x ternal pul l -up resistor. 7 s c l serial clock line. this is used in conj unction wit h the sda line to clock data into or out of the 1 6 -bit input shift register. clock r a tes of up to 400 kbps ca n be a ccommodated in the 2-wire interface. 8 a0 address input. s e ts the least sig n ificant bit of the 7-bit slave address.
ad5337/ad5338/ad5339 rev. a | page 9 of 24 terminology relative accuracy (integral nonlinearity, inl) for the dac, relative accuracy, or integral nonlinearity (inl), is a measure, in lsbs, of the maximum deviation from a straight line passing through the endpoints of the dac transfer function. typical inl vs. code plots can be seen in figure 6, figure 7, and figure 8. differential nonlinearity (dnl) the difference between the measured change and the ideal 1 lsb change between any two adjacent codes. a specified differential nonlinearity of 1 lsb maximum ensures monotonicity. this dac is guaranteed monotonic by design. typical dnl vs. code plots can be seen in figure 9, figure 10, and figure 11. offset error a measure of the offset error of the dac and the output amplifier, expressed as a percentage of the full-scale range. gain error a measure of the span error of the dac. it is the deviation in slope of the actual dac transfer characteristic from the ideal, expressed as a percentage of the full-scale range. offset error drift a measure of the change in offset error with changes in temperature. it is expressed in (ppm of full-scale range)/c. gain error drift a measure of the change in gain error with changes in temperature. it is expressed in (ppm of full-scale range)/c. power supply rejection ratio (psrr) this indicates how the output of the dac is affected by changes in the supply voltage. psrr is the ratio of the change in v out to a change in v dd for full-scale output of the dac. it is measured in db. v ref is held at 2 v and v dd is varied 10%. dc crosstalk the dc change in the output level of one dac at midscale in response to a full-scale code change (all 0s to all 1s and vice versa) and output change of another dac. it is expressed in v. reference feedthrough the ratio of the amplitude of the signal at the dac output to the reference input when the dac output is not being updated. it is expressed in db. major-code transition glitch energy the energy of the impulse injected into the analog output when the code in the dac register changes state. normally specified as the area of the glitch in nv-s and is measured when the digital code is changed by 1 lsb at the major carry transition (011 . . . 11 to 100 . . . 00 or 100 . . . 00 to 011 . . . 11). digital feedthrough a measure of the impulse injected into the analog output of the dac from the digital input pins of the device when the dac output is not being updated. specified in nv-s and measured with a worst-case change on the digital input pins, such as changing from all 0s to all 1s or vice-versa. digital crosstalk the glitch impulse transferred to the output of one dac at mid- scale in response to a full-scale code change (all 0s to all 1s, or vice versa) in the input register of another dac. it is expressed in nv-s. dac-to-dac crosstalk the glitch impulse transferred to the output of one dac due to a digital code change and subsequent output change of another dac. this includes both digital and analog crosstalk. it is measured by loading one of the dacs with a full-scale code change (all 0s to all 1s, or vice versa) with the ldac bit set low and monitoring the output of another dac. the energy of the glitch is expressed in nv-s. multiplying bandwidth the amplifiers within the dac have a finite bandwidth. the multiplying bandwidth is the frequency at which the output amplitude falls to 3 db below the input. a sine wave on the reference (with full-scale code loaded to the dac) appears on the output. total harmonic distortion (thd) the difference between an ideal sine wave and its attenuated version using the dac. the sine wave is used as the reference for the dac, and the thd is a measure of the harmonic distortion present in the dac output. it is measured in db.
ad5337/ad5338/ad 5339 rev. a | page 10 of 24 actual ideal gain error plus offset error output voltage negativ e offset error dac code amplifier footroom ( 1 mv ) d e a d b a n d c o d e s negativ e offset error 03756-a - 004 f i gure 4 . t r ansfer f u ncti on wi th neg a ti v e o ffset outpu t voltage positive offset dac code gain error plus offset error actual ideal 03756-a - 005 f i gure 5 . t r ansfer f u ncti on wi th p o s i tiv e o ffset
ad5337/ad5338/ad 5339 rev. a | page 11 of 24 typical perf orm ance cha r acte ristics inl error (lsb) ?1.0 ?0.5 0 0.5 1.0 0 5 0 100 150 200 250 code 03756-a - 006 t a = 25 c v dd = 5v f i g u re 6. a d 53 37 t y pic a l inl p l ot ?3 ?2 ?1 0 1 2 3 inl error (lsb) 0 200 400 600 800 1000 code 03756-a - 007 t a = 25c v dd = 5v f i g u re 7. a d 53 38 t y pic a l inl p l ot ?12 ?8 ?4 0 4 8 12 inl error (lsb) 20 00 1500 500 1 000 0 2500 30 00 3500 4 000 code 03756-a - 008 t a = 25c v dd = 5v f i g u re 8. a d 53 39 t y pic a l inl p l ot ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 dnl error (lsb) 0 5 0 100 150 200 250 code 03756-a - 009 t a = 25 c v dd = 5v f i g u re 9. a d 53 37 t y pic a l d n l p l ot ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 dnl error (lsb) 0 200 400 600 800 1000 code 03756-a - 010 t a = 25 c v dd = 5v f i gur e 1 0 . ad53 38 t y pi c a l dnl p l o t dnl error (lsb) ?1.0 ?0.5 0 0.5 1.0 20 00 1500 500 1 000 0 2500 30 00 3500 4 000 code 03756-a - 011 t a = 25c v dd = 5v f i gur e 1 1 . ad53 39 t y pi c a l dnl p l o t
ad5337/ad5338/ad 5339 rev. a | page 12 of 24 e rror (ls b ) ? 0.50 ? 0.25 0 0.25 0.50 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v ref (v) 03756-a - 012 t a = 25c v dd = 5v max inl max dnl min dnl min inl f i gur e 1 2 . ad53 37 inl a n d dnl err o r v s . v ref ? 0.5 ? 0.4 ? 0.3 ? 0.2 ? 0.1 0 0.1 0.2 0.3 0.4 0.5 e rror (ls b ) temperature ( c) 0 ?40 4 0 8 0 120 03756-a - 013 v dd = 5v v ref = 3v max inl max dnl min dnl min inl f i gur e 1 3 . ad53 37 inl a n d dnl err o r v s . t e m p e r a t ur e e rror (%) ?1.0 ?0.5 0 0.5 1.0 temperature ( c) 0 ?40 4 0 8 0 120 03756-a - 014 v dd = 5v v ref = 2v gain error offset error f i gur e 1 4 . ad53 37 o ffse t er r o r a n d gai n err o r vs . t e m p er a t ur e ? 0.6 ? 0.5 ? 0.4 ? 0.3 ? 0.2 ? 0.1 e rror (%) 0 0.1 0.2 23 01 4 5 6 v dd (v) 03756-a - 015 t a = 25c v ref = 2v gain error offset error f i gure 15. o ffs et e r r o r a n d g a in e rror v s . v dd 0 1 2 3 4 5 v out (v ) 23 01 4 5 6 sink/source current (ma) 03756-a - 016 5v source 3v source 5v sink 3v sink f i g u re 16. v ou t s o u r c e and sink curr ent c a pab i lit y 0 50 100 150 200 250 300 i dd ( a) zero scale full scale code 03756-a - 017 t a = 25c v dd = 5v v ref = 2v f i gure 17. sup p l y current v s . code
ad5337/ad5338/ad 5339 rev. a | page 13 of 24 0 50 100 150 200 250 300 i dd ( a) 3.5 4.0 2.5 3.0 4.5 5.0 5.5 v dd (v) 03756-a - 018 +25 c ?4 0 c +105 c f i gure 18. sup p l y current v s . sup p ly v o ltag e 0 0.1 0.2 0.3 0.4 0.5 i dd ( a) 3.5 4.0 2.5 3.0 4.5 5.0 5.5 v dd (v) 03756-a - 019 +25c ?40 c +105c f i gure 19. p o wer - d o wn cur r ent vs. su p p ly v o ltage 0 50 100 150 200 250 i dd ( a) 300 350 400 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v logic (v) 03756-a - 020 t a = 25c v dd = 5v v dd = 3v increasing decreasing f i gure 20. sup p l y current v s . l o gic i n p u t v o ltag e fo r sd a and scl v o lt age increasi ng a n d d e c r e a sing 03756-a - 021 t a = 25c v dd = 5v v ref = 5v v out a scl ch1 ch1 1v, ch2 5v, time base = 1 s/div ch2 f i g u re 21. h a lf -s c a l e s e t t ling ( 1 / 4 t o 3/ 4 s c a l e cod e ch an g e ) 03756-a - 022 t a = 25c v dd = 5v v ref = 2v v out a v dd ch1 ch1 2 v , ch2 2 0 0 m v , t i m e ba s e = 200 s/ div ch2 f i g u re 22. p o wer - o n r e s e t to 0 v 03756-a - 023 t a = 25c v dd = 5v v ref = 2v v out a scl ch1 ch 1 500 m v , ch2 5 v , t i m e b a s e = 1 s/ di v ch2 f i gure 23. existing p o w e r - d o wn to m i dsc a le
ad5337/ad5338/ad 5339 rev. a | page 14 of 24 03756-a - 024 v dd = 5v v dd = 3v fre q ue ncy i dd ( a) 150 200 250 300 f i g u re 24. i dd hi st ogr a m wi th v dd = 3 v and v dd = 5 v v out (v ) 2.47 2.49 2.48 2.50 03756-a - 025 1 s/div f i gur e 2 5 . ad53 39 ma j o r - c o de t r a n si t i o n gli t c h ene r gy ?60 ?50 ?40 ?30 ?20 ?10 0 10 db 1k 10k 10 100 100k 1m 10m frequency (hz) 03756-a - 026 f i gure 26. multip lying band width (sma ll -si g na l f r e q uenc y re sp o n se ) full-s cale e rror (v ) ? 0.02 ? 0.01 0 0.01 0.02 23 01 4 5 6 v ref (v) 03756-a - 027 t a = 25c v dd = 5v f i gure 27. f u ll- s c al e e rror v s . v ref 1mv/d i v 50ns/div 03756-a - 028 f i gure 28. d a c-to -d a c crosstalk
ad5337/ad5338/ad 5339 rev. a | page 15 of 24 functional description the ad5337 /ad5338/ad5339 a r e d u a l r e sis t o r -s tr in g d a cs f a br i c a t e d on a c m o s pro c e s s w i t h re s o lut i ons of 8 , 1 0 , and 12 b i ts, r e sp ec tiv e l y . e a ch co n t ain s tw o o u t p u t b u f f er a m p l if iers a nd is wr i t t e n to vi a a 2 - wir e s e r i al i n t e r f ace . th e d a cs o p era t e f r o m sin g le s u p p l ies o f 2.5 v t o 5.5 v , an d t h e ou t p u t b u f f er a m p l i f i e r s p r o v id e ra il- t o- ra il o u t p u t swi n g wi t h a s l ew ra t e o f 0.7 v/s. the t w o d a cs s h a r e a sin g le r e fer e nc e in pu t p i n. e a ch d a c has t h r e e p r og ra mma b l e p o wer - do w n m o des t h a t a l lo w t h e o u t p ut a m plif ier t o b e co nf igur e d w i t h ei t h er a 1 k? lo ad t o g r o u n d , a 100 k? lo ad to g r o u n d , o r as a hig h im p e dan c e t h r e e-s t a t e o u t p u t . digit a l - t o -anal o g c o nverter se c t ion t h e arch ite c tu r e of one d a c c h an n e l c o ns i s t s of a re s i stor - st r i ng d a c fol l o w e d b y an output b u f f e r am pl i f i e r . t h e volt age a t t h e refi n p i n p r o v ides t h e refer e n c e v o l t a g e fo r t h e d a c. f i gur e 29 sh o w s a b l o c k d i a g ram o f t h e d a c ar chi t e c t u r e . b e c a u s e th e i n p u t c o d i n g t o th e d a c i s s t r a i g h t b i n a r y , th e i d e a l out p ut vol t age i s g i ve n b y n ref out 2 d v v = w h er e: d is t h e de ci ma l e q ui va le n t o f t h e b i na r y co de, w h ich is lo ade d to t h e d a c re g i ste r ; 0C255 f o r ad5337 (8 b i ts) 0C1023 f o r ad5338 a nd ad533 8-1 (10 b i ts) 0C4095 f o r ad5339 (12 b i ts) n is t h e d a c r e s o l u t i o n input register refin output buffer amplifier v out a resistor string dac register 03756- a- 029 f i gure 29. d a c ch annel a r ch itecture resist or string the r e sist o r st r i n g p o r t io n is sho w n i n f i gur e 3 0 . i t is sim p ly a s t r i n g o f r e sis t o r s, eac h o f val u e r . th e dig i tal c o de lo ade d t o t h e d a c r e g i s t e r det e r m i n es t h e n o de a t w h ich t h e v o l t a g e is t a p p e d o f f a nd fe d i n t o t h e o u t p u t a m plif ier . the v o l t a g e is t a pp e d of f b y cl o s i n g one of t h e s w itc h e s t h at c o n n e c t s t h e s t r i n g t o t h e am plif ier . b e ca us e t h e d a c com p r i s e s a s t r i n g o f r e sis t o r s, i t is gua r a n t e e d t o b e m o n o t o nic. r r r r r to output amplifier 03756-a - 030 f i gur e 3 0 . resi st or str i ng d a c reference input s ther e is a sing le r e fer e n c e in p u t p i n fo r t h e tw o d a cs. the re f e re nc e i n put i s u n bu f f e r e d . t h e u s e r c a n h a v e a re f e re nc e vol t a g e as lo w a s 0.25 v a nd as hig h as v dd , since t h er e is n o re st r i c t i o n d u e t o he a d ro om a n d f o ot ro om of an y re f e re nc e a m plif ier . i t is r e co mm e nde d t o us e a b u f f er e d r e fer e n c e in t h e ext e r n al cir c ui t, f o r exa m p l e , ref192. the in p u t im p e dan c e is typ i cal l y 45 k?. outpu t am plifier t h e o u t p u t b u f f er a m p l if ier is ca p a b l e o f g e n e ra tin g ra il-t o-ra il vo lt age s on it s o u tput , w h i c h g i ve s an output r a nge of 0 v to v dd w h en t h e r e fer e n c e is v dd . the a m pl if ier is ca p a b l e o f dr i v in g a lo ad of 2 k? t o gnd o r v dd in p a ral l e l wi t h 500 pf to gnd o r v dd . th e s o ur ce an d sink c a p a b i li ties o f th e o u t p u t a m plif ier can b e s e en i n t h e plo t in f i gur e 16. the s l e w ra t e is 0.7 v/s wi th a half-s c a le s e t t lin g tim e t o 0.5 ls b (a t 8 b i ts) o f 6 s. po wer- on reset the ad5337 /ad5338/ad5339 p o w e r o n in a def i n e d s t a t e via a p o wer - on r e s e t f u n c t i on. t h e p o wer - o n st a t e is n o r m a l op e r a t i o n , w i t h output vo lt age s e t to 0 v . b o t h i n p u t an d d a c r e g i sters ar e f i l l e d wi t h ze r o s un t i l a va l i d wr i t e s e q u ence is made t o t h e device . this is p a r t ic u l a r l y us ef u l in a p plic a t io n s w h er e i t is im p o r t a n t t o k n o w t h e st a t e o f t h e d a c o u t p u t s w h i l e t h e de vice is p o w e r i n g on. serial interf a c e the ad5337 /ad5338/ad5339 a r e co n t r o l l ed via an i 2 c- co m p a t i b le s e r i al b u s. th e d a cs a r e co nn e c t e d t o t h is b u s as s l a v e de vicest h a t is, n o c l o c k is g e n e ra t e d b y t h e ad5337/ ad5338/ad53 39 d a cs. this in t e r f ac e is s m bus-co m p a t i b l e a t v dd < 3.6 v .
ad5337/ad5338/ad 5339 rev. a | page 16 of 24 the ad5337 /ad5338/ad5339 ha v e a 7 - b i t sl a v e addr ess. th e six ms bs a r e 000110, a nd t h e l s b is det e r m in e d b y t h e s t a t e o f th e a0 p i n. the facili ty o f makin g ha r d wir e d cha n g e s t o a0 al lo ws t h e us e of o n e o r tw o o f t h es e de v i ces o n o n e b u s. th e ad5338-1 has a uniq ue 7-b i t sla v e addr ess. th e six ms bs a r e 010001, a nd t h e ls b is a g a i n det e r m in e d b y t h e s t a t e o f the a0 p i n. u s in g a com b ina t io n o f ad5338 a nd ad5338-1 al lo ws t h e us er t o acco mmo da t e f o ur o f thes e d u al 10-b i t de vices (eig h t cha nnels) o n t h e s a me b u s. the 2- wir e s e r i al b u s p r o t o c ol o p era t es as fol l o w s: 1. the mast er ini t ia t e s da ta tra n sfe r b y es ta b l is hing a s t a r t co n d i ti o n w h en a h i g h - t o- lo w t r a n si ti o n o n t h e s d a lin e o c c u rs w h i l e s c l is hig h . th e fol l o w in g b y te is t h e addr es s b y t e , w h ich co nsis ts o f t h e 7 - b i t s l a v e addr es s, fol l o w e d b y an r / w bi t . ( t h i s bit d e t e r m i n e s w h e t h e r d a t a i s re a d f r om or w r i tte n to t h e sl a v e de v i c e . ) the sl a ve w i t h t h e address c o r r e s p o nding t o t h e t r an smi t t e d addr ess r e sp o nds b y p u l l ing sd a lo w d u r i n g t h e ni n t h clo c k p u ls e (t hi s is t e r m e d t h e ack n o w le dge b i t ) . a t t h is s t a g e, al l o t h e r de vices on t h e b u s r e ma in idl e w h i l e t h e s e l e c t e d d e v i c e w a i t s for d a t a to b e w r it te n to or re a d f r om i t s shif t r e g i st er . 2. d a t a is tra n smi t t e d o v er t h e s e r i al b u s in s e q u e n ces o f nine clo c k p u ls es (ei g h t d a t a b i ts, fol l o w e d b y a n ack n o w le dge b i t ) . t h e t r a n s i ti o n s o n th e s d a l i n e m u s t oc cu r d u ri n g th e l o w p e ri od o f s c l a n d r e m a i n s t a b l e d u ri n g th e h i gh p e ri od o f scl. 3. whe n a l l d a t a bit s h a ve b e e n re a d f r om or w r itt e n to , a stop co ndi t i on is es t a b l ish e d . i n wr i t e m o de , t h e mas t er p u l l s t h e s d a li n e hi g h d u r i n g t h e 1 0 t h clo c k p u ls e t o es t a b l i s h a stop c o nd i t ion . i n re a d mo d e , t h e ma ste r issu e s a n o a c kno w le dg e f o r th e nin t h c l o c k p u ls e , tha t is, t h e s d a line r e ma i n s hig h . th e mas t er t h e n b r i n gs t h e sd a li ne lo w b e fo r e t h e 10t h clo c k p u ls e an d hig h d u r i n g t h e 10t h clo c k p u lse t o e s ta b l ish a st o p co n d i t io n . read /write seq u ence f o r th e ad5337 /ad5338 /ad53 39, al l wr i t e acc e s s s e q u en ces a nd m o st r e ad s e q u ences b e g i n wi t h t h e d e v i ce addr ess ( w i t h r/ w = 0 ) , f o l l o w e d by t h e p o i n t e r by t e . t h i s p o i n t e r by t e s p e c i f i e s t h e d a t a fo r m a t a nd de t e r m i n es w h ich d a c is b e in g acce ss e d i n t h e s u b s e q ue n t r e ad/ w r i t e o p er a t io n. s e e f i gur e 31. i n a wr i t e o p e r at i o n , t h e d a t a f o l l ow s i m m e d i at e l y . in a r e a d o p e r at i o n , t h e addr ess is r e s e n t w i t h r/ w = 1, a nd t h en t h e da t a is r e ad b a ck. h o w e v e r , i t is al s o p o s s i b le t o p e r f o r m a r e ad o p era t ion b y s e ndi n g o n ly t h e addr ess w i t h r/ w = 1 . the p r e v iou sly l o ade d p o in t e r s e t t i n gs a r e t h e n us e d for t h e r e ad b a ck o p era t ion. s e e f i gur e 32 fo r a g r a p hica l expl ana t io n o f t h e in ter f ace. 03756-a-031 0 x x lsb msb 0 dacb daca do ubl e = 0 0 f i gure 31. p o inter b y te the fol l o w in g t a b l e expla i n s t h e i n di v i d u al b i t s t h a t ma k e u p t h e p o i n te r b y te . tab l e 6. poin ter by te bits p o i n t e r b y t e b i t s x dont care bits. 0: bit set to 0. double 0: data write and readback are done as 2-byte write/read se quences. 0: bit set to 0. 0: bit set to 0. dacb 1: t h e followi ng d a ta bytes are for dac b. daca 1: t h e followi ng d a ta bytes are for dac a. input shift r e gister the i n p u t shif t r e g i st er is 16 b i t s wi de . d a t a is lo ade d i n t o t h e d e v i c e a s t w o d a t a b y t e s o n th e s e ri a l d a ta l i n e , s d a , un d e r th e co n t r o l o f t h e s e r i al clo c k in p u t, scl. th e t i mi ng dia g ram fo r t h is o p era t io n is sho w n i n f i gur e 2. t h e tw o da t a b y t e s con s ist o f f o ur co n t r o l b i ts f o l l o w ed b y 8, 10, o r 12 b i ts o f d a c da t a , dep e ndi n g o n t h e de vic e ty p e . the f i rst tw o b i t s lo ade d a r e pd 1 a nd pd0 b i ts t h a t co n t r o l t h e mo de o f o p er a t io n o f t h e d e v i ce. s e e t h e p o wer - d o w n m o des s e c t io n fo r a co m p lete des c r i p t ion. b i t 13 is clr , b i t 12 is ld a c , a nd t h e r e m a ini n g b i ts a r e l e f t - j u s t i f i e d d a c da ta b i t s , s t a r ti n g w i th t h e ms b . s e e f i gur e 32. tab l e 7. i n p u t shift register register setting and re sult clr 0: all dac registers and input registers are filled with 0s on com p letio n of the write sequence. 1: normal oper a tion. ldac 0: the two dac registers and therefore all dac outputs simultaneously up dated on compl e tion of the write seque n ce. 1: addres s e d input regis t er only is updated. there is no change in th e contents of the dac registers. def a ult r e ad bac k c o n d ition al l p o i n t e r b y t e b i ts p o w e r - u p to 0. th er efo r e , i f t h e us er i n i t i a te s a re a d b a ck w i t h out w r it i n g to t h e p o i n te r b y te f i rs t , no sin g le d a c c h anne l has be e n sp e c if ie d . i n this cas e , t h e def a u l t r e ad back b i ts a r e al l 0, excep t f o r th e clr b i t, w h ich is 1. multiple-dac write s e quence b e ca us e t h er e ar e indivi d u al b i t s in t h e p o i n t e r b y t e fo r e a ch d a c, i t is p o s s ib le t o wr i t e t h e s a m e da t a an d c o n t r o l b i ts t o two d a c s s i m u l t a n eo us l y b y set t i n g th e r e l eva n t b i t s t o 1.
ad5337/ad5338/ad 5339 rev. a | page 17 of 24 multiple-dac read b a ck s e quence. i f the us er a t t e m p ts t o r e ad bac k da t a f r o m mo r e tha n o n e d a c a t a ti m e , th e pa rt r e a d s b a c k th e d e f a ul t , po w e r - o n r e s e t co ndi tion s, i . e ., al l 0s excep t f o r clr , w h ich is 1. write oper a t ion w h en wr i t ing to th e ad5337/ad5338/ad53 39 d a cs, t h e us er m u st b e g i n wi t h a n a ddr ess b y te (r/ w = 0), a f t e r which t h e d a c ac k n o w le dg es tha t i t is p r ep a r ed t o r e cei v e da t a b y p u l l ing s d a lo w . this a ddr ess b y t e is fol l o w e d b y t h e p o in t e r b y t e , which is als o ackn o w ledg e d b y th e d a c. t w o b y t e s o f da t a a r e t h e n w r it te n to t h e d a c , a s s h ow n i n f i g u re 3 3 . a stop co ndi t i on fol l o w s. 03756-a - 032 pd0 clr lda c d7 d6 d5 d4 pd1 lsb msb 8-bit ad5337 pd0 clr ld ac d9 d8 d7 d6 pd1 pd0 d 1 1 d10 d 9 d8 pd1 most significant data byte lsb msb 10-bit ad5338 lsb msb 12-bit ad5339 clr ld ac least significant data byte d3 d2 d1 d0 x d5 d4 d3 d2 d1 d0 x x d7 d6 d5 d4 d3 d2 d1 d0 lsb msb 8-bit ad5337 lsb msb 10-bit ad5338 lsb msb 12-bit ad5339 xx x f i g u re 32. d a t a f o r m at s f o r wri t e and r e ad b a ck mo st si g n i f i c a n t d a t a b yt e l e a s t s i g n i f i ca n t da t a b y t e 0 001 1 a 0 r/ w xx l s b ack by ad533x ack by ad533x msb a d dre s s by t e start condition by ma st er sc l sd a sc l sd a msb l sb msb l sb ack by ad533x ack by ad533x stop condition by master po i n t e r b yt e 0 03756-a - 033 f i gure 33. w r ite s e quenc e
ad5337/ad5338/ad 5339 rev. a | page 18 of 24 read oper a t ion w h en r e adin g da ta b a c k f r o m th e ad5337 /ad5338/ad5339 d a cs, t h e us er b e g i n s wi t h an addr es s b y t e (r / w = 0), a f t e r which t h e d a c ac kno w le dg es t h a t i t is p r ep a r ed t o r e cei v e da t a b y p u l l in g sd a lo w . this ad dr ess b y t e is usua l l y fol l o w e d b y t h e p o in t e r b y te , w h ich is a l s o ack n o w le dge d b y t h e d a c. t h en t h e master in i t ia tes a n o t h e r st a r t co ndi t i on (r ep e a te d st a r t) an d t h e addr ess is r e s e n t w i t h r/ w = 1. this is ack n o w le dge d b y t h e d a c in d i ca t i n g th a t i t i s p r e p a r ed t o tra n smi t da ta . t w o b y t e s o f da t a a r e t h en r e ad f r o m the d a c as sh o w n in f i gur e 34. a sto p co nd i t io n fol l o w s. n o te t h a t in a r e ad s e q u en c e , da t a b y tes a r e t h e s a me as t h os e in t h e wr i t e s e q u e n c e excep t t h a t don t ca r e s a r e r e ad b a c k as 0. h o wever , if the mas t er s e nds a n a c k a nd co n t in ues clo c kin g scl (no s t o p is s e n t ), t h e d a c r e tra n smi t s t h e s a m e tw o b y t e s o f da t a o n s d a. this al lo ws co n t in uo us r e ad bac k o f da t a f r o m t h e s e lec t e d d a c r e g i s t er . al ter n a t i v e l y , t h e us er ma y s e nd a s t a r t fol l o w e d b y t h e addr es s wi t h r/ w = 1. i n t h is cas e , t h e p r e v io usly lo ade d p o in t e r s e t t in gs a r e us e d an d r e a d b a ck o f da t a can b e g i n i m m e d i a t ely . 03756-a - 034 d a ta b y te l e a s t s i g nif i c a nt d a ta b y te 00 0 1 1 a 0 r / w x x ls b ack by ad533x sc l sd a start condition by ma ster ac k by a d 5 33x msb sc l sd a 00 0 1 1 0 a0 r/ w m s b repeated start condition by master ack by ad533x a d dre s s by t e sc l sd a msb l s b no ac k by ma ster stop condition by master po i n t e r b yt e a ddr e s s b y t e 0 ack by master ls b f i g u re 34. r e ad s e quenc e
ad5337/ad5338/ad 5339 rev. a | page 19 of 24 double-buffered interf a c e the ad533 7/ad53 38 /ad5 339 d a cs al l ha v e a doub le-b uf f e r e d in t e r f ace co n s ist i n g o f tw o b a n k s o f r e g i st ers a n i n p u t r e g i st e r a nd a d a c r e g i ster p e r cha n nel. the i n p u t r e g i ster is dir e c t ly co nn e c te d t o t h e in p u t shif t r e gister , a n d t h e dig i t a l co de is t r ans f e r re d to t h e rel e v a n t i n p u t re g i ste r up o n c o m p l e t i on of a vali d wr i t e s e q u en c e . th e d a c r e g i s t er co n t ains t h e dig i t a l co de u s e d b y t h e re s i stor st r i ng . a c c e ss to t h e d a c re g i ste r is c o n t rol l e d b y t h e ld a c bit . w h e n th e ld a c b i t is s e t hi g h , t h e d a c reg i st er is l a t c he d and t h erefo r e t h e in p u t r e g i st e r ma y cha n g e s t a t e w i t h o u t a f fe c t in g t h e d a c r e g i st er . this is us ef u l if t h e u s er r e qu ir es si m u l t ane o us up da t i n g o f al l d a c o u t p u t s. th e us er ma y wr i t e t o t h r e e o f t h e in pu t re g i ste r s i ndiv i du a l ly ; b y s e t t ing t h e ld a c b i t lo w w h en wr i t i n g t o t h e r e main ing d a c i n p u t r e g i st er , a l l o u t p u t s wi l l up da te s i m u l t ane o u sly . th e s e p a r t s co n t a i n an ext r a fe a t ur e w h er e b y t h e d a c r e g i st er is o n l y u p da t e d if i t s in p u t r e g i st er has be e n u p da t e d sin c e t h e las t t i m e tha t ld a c w a s b r o u gh t l o w , th e r eb y r e m o vin g u n ne c e ss ar y dig i t a l c r o sst a l k. po wer-down modes the ad5337 /ad5338/ad5339 ha v e v e r y lo w p o w e r co n s um p t io n, typ i cal l y dis s i p a t in g 0.75 mw wi th a 3 v s u p p l y a nd 1.5 m w wi t h a 5 v su p p ly . p o w e r co n s u m pt io n can b e f u r t h e r r e d u ce d w h en t h e d a c s a r e n o t in us e b y p u t t ing t h em in t o on e o f t h r e e p o w e r - do w n m o des, w h ich ar e s e le c t e d b y b i ts 15 an d 14 ( p d1 an d p d 0) o f th e da ta b y te . t a b l e 8 sh o w s h o w t h e s t a t e o f t h e b i ts co r r es p o n d s t o t h e mo de o f o p era t ion of t h e d a c . table 8. pd1/pd0 o p erating modes p d 1 p d 0 operating m o d e 0 0 normal ope rati o n 0 1 power-down (1 k? load to gnd ) 1 0 power-down (100 k? load to g n d) 1 1 power-down (3-state output ) w h en b o t h b i ts a r e 0, t h e d a c w o rks wi t h i t s no r m al p o w e r co n s um p t io n o f 300 a a t 5 v . h o w e v e r , f o r the thr e e p o wer - do wn m o des, t h e s u p p l y c u r r en t fal l s t o 200 na a t 5 v (80 na a t 3 v). n o t onl y do es t h e s u p p l y c u r r en t dr o p , b u t t h e o u t p u t st a g e is a l s o in t e r n a l ly swi t ch e d f r o m t h e o u t p ut o f t h e am plif ier to a re s i stor ne t w or k of k n ow n v a lu e s . t h i s i s a d v a n t age o u s i n t h a t t h e ou t p u t i m p e dan c e o f t h e p a r t is kn o w n w h i l e t h e p a r t is in p o w e r - do wn m o de , w h ich p r o v i d es a def i n e d in p u t con d i t io n fo r w h a t e v er is co nn e c t e d t o t h e o u t p ut o f t h e d a c am plif ier . ther e a r e t h r e e o p t i on s . the out p ut ma y b e conne c t e d i n t e r n a l ly t o gnd t h r o ug h a 1 k? r e sis t or , a 100 k? r e sis t o r , o r ma y be lef t o p en -cir c u i t e d (3-st a t e ). res i st o r t o lera n c e = 20%. th e ou t p ut st age is i l l u st r a te d in fig u re 3 5 . 03756-a - 035 amplifier power-down circuitry resistor network resistor string dac v out f i gure 35. o u tput s t age dur i ng p o wer - d o wn the b i as g e n e ra t o r , t h e ou t p u t am plif iers, t h e r e sis t o r s t r i n g , and al l o t h e r ass o c i a t e d line a r cir c ui tr y a r e s h u t do wn w h e n p o wer - d o w n m o d e i s acti v a t e d . h o w e v e r , th e co n t en t s o f th e d a c r e g i st ers r e main u n c h an g e d w h e n p o w e r - do wn mo de is ac t i v a t e d . the t i m e t o exi t p o w e r - do wn is typ i c a l l y 2.5 s f o r v dd = 5 v a nd 5 s w h e n v dd = 3 v . this is th e t i m e f r o m th e r i sin g edg e o f t h e e i g h t h sc l p u ls e t o t h e t i m e w h en t h e o u t p u t v o l t a g e de via t es f r o m i t s p o w e r - do wn vol t a g e . s e e f i gu r e 23 f o r a p l o t .
ad5337/ad5338/ad 5339 rev. a | page 20 of 24 appli c a t ions ty pic a l app l ic a t io n cir c uit the ad533 7/ad53 38 /ad5 339 can b e u s ed wi t h a wide ran g e of re f e re n c e vo lt ag e s f o r f u l l , o n e - q u a d r a n t m u lt ip l y i n g c a p a bi l i t y o v e r a re f e re nc e r a nge of 0 v to v dd . m o r e typ i c a l l y , t h e s e de vices a r e us e d wi t h a f i xe d p r e c isio n r e fer e n c e vol t a g e. s u i t a b l e refere n c es fo r 5 v op er a t ion a r e t h e ad 7 80, t h e ref1 92, a nd t h e adr39 1 (2.5 v r e fer e n c es). f o r 2.5 v o p era t ion, a s u i t ab le ext e r n a l r e f e r e n c e w o u l d b e t h e ad589 o r ad1580, a 1.23 v ban d ga p r e f e r e n c e . f i g u r e 36 s h o w s a typ i cal s e t u p f o r t h e ad5 337 /ad5338 /ad533 9 w h en us ing an ex ter n al ref e r e nc e . n o t e t h a t a0 can b e hig h o r lo w . ad5337 / ad5338 / ad5339 gnd sda s e rial i n terface v ou t ext ref 0.1 f refin a d780/ref192/adr391 with v dd = 5v or ad589/ad1580 wit h v dd = 2.5v v dd = 2.5v to 5.5v v in a0 10 f 1 f scl v out a v out b 03756-a - 036 f i gur e 3 6 . ad53 37 /ad5 33 8/ ad533 9 u s i n g ex t e rnal re fer e nc e i f a n o u t p u t rang e o f 0 v t o v dd is r e q u ir e d , t h e sim p lest s o lut i on i s to c o n n e c t t h e re f e re nc e i n put to v dd . b e c a us e t h is s u p p l y ma y b e inacc u ra t e and no isy , th e ad533 7/ad5338 / ad5339 ma y be p o w e r e d f r o m a r e f e r e n c e v o l t a g e , f o r exa m p l e , usin g a 5 v r e f e r e n c e s u ch as t h e ref195 which p r o v ides a s t ead y o u t p u t su p p l y v o l t a g e . w i t h n o lo ad on t h e d a cs, t h e ref195 is r e q u ir ed t o s u p p l y 600 a s u p p l y c u r r en t t o t h e d a c a nd 112 a t o t h e r e f e r e n c e in p u t. w h en t h e d a c o u t p u t s a r e lo aded , t h e ref195 als o n eeds to s u p p l y th e c u r r en t t o t h e lo ads; t h er efo r e , t h e t o t a l c u r r en t r e q u ir e d w i t h a 10 k? lo ad o n ea c h o u t p u t i s 712 a 2(5 v/10 k? ) = 1.7 ma the lo ad r e gu l a tio n o f t h e ref 195 is typ i cal l y 2 p p m /ma, which r e s u l t s in a n er r o r o f 3.4 p p m (17 v) f o r th e 1.7 ma c u r r en t dra w n f r o m i t . this co r r es p o n d s t o a 0. 0009 ls b er r o r a t 8 b i ts and a 0. 014 ls b er r o r a t 12 b i ts. bipol a r oper a t ion the ad5337 /ad5338/ad5339 a r e desig n e d f o r sin g le-s u p p l y o p era t ion, b u t a b i p o la r o u t p u t ra n g e is a l s o p o ssi b le using t h e c i rc u i t i n fi g u re 3 7 . t h i s c i rc u i t g i ve s an output vo lt age r a nge of 5 v . r a i l - t o-ra i l o p era t ion a t t h e am plif ier o u t p u t is achi e v ab l e usin g a n ad82 0 o r a n o p 295 as th e ou t p u t am p l if ier . +5v ?5v ad820 / op295 10 f 6v to 12v ad5339 0.1 f v dd v ou t a r1 = 10k ? 5v r2 = 10k ? refin a0 g n d v out v in ad1585 +5v 2-wire serial interface sc l sd a v out b gnd 1 f 03756-a - 037 f i gure 37. bipolar o p er at ion with the ad5339 the o u t p u t v o l t a g e fo r a n y in p u t co de ca n b e ca lc u l a t e d as fol l o w s: ( ) ) ) ( ( ( ) [ ] 1 2 1 2 1 2 r r refin r r r d refin v n out ? + w h er e: d is the de c i ma l e q ui vale n t o f t h e co de lo ade d t o th e d a c. n is t h e d a c r e s o l u t i o n . refin is t h e r e fer e n c e v o l t a g e i n p u t . wi t h refin = 5 v , r1 = r2 = 10 k?: v ou t = ( 10 d/ 2 n ) ? 5 mul t iple de vices on one bus f i gur e 38 sh o w s tw o ad5339 devices o n t h e s a m e s e r i al b u s. e a ch has a dif f er en t sla v e addr es s b e ca us e t h e st a t e o f t h e a0 p i n is dif f er en t. this al lo ws each o f f o ur d a cs t o b e wr i t ten t o o r r e ad f r o m i n de p e nde n t ly . 03756-a - 038 p u ll- u p r esi st o r s sc l sd a ad5339 a0 ad5339 sc l sd a a0 v dd microcontroller f i g u re 38. m u lt ip le a d 53 39 d e v i ces on o n e bus
ad5337/ad5338/ad 5339 rev. a | page 21 of 24 produc t as a digit a l l y progr a mmable windo w detec t or f i gur e 39 sh o w s a d i g i tall y p r ogra mma b l e u p p e r/lo w e r limi t det e c t o r usin g t h e tw o d a cs in th e ad5337/ad5338/ad5339. t h e u p p e r a n d lo w e r limi ts f o r th e t e s t a r e lo ad e d in t o d a c a a nd d a c b , w h ic h, in t u r n , s e t th e l i mi ts on t h e cmp04. i f t h e sig n al a t t h e v in in p u t is n o t wi t h in t h e p r og ra mm e d wi ndo w , a n led in d i ca t e s th e fa il co n d i t io n . 03756-a-039 ad5337 / ad5338 / ad5339 * v dd 5v v out a gnd refin v in pass/fail 1/2 cmp04 1/6 74hc05 fail pass 1k ? 0.1 f scl sda scl din 1k ? v out b v ref * additional pins omitted for clarity 10 f f i gure 39. window d e tec t ion c o arse and fine adju st ment c a p a bilities the tw o d a cs in t h e ad5337/ad5338/ad53 39 ca n be p a ir e d t o g e th er t o f o r m a co a r s e and f i n e ad j u s t m e n t f u n c tion, as sh ow n i n fi g u re 4 0 . d a c a i s u s e d to prov i d e t h e c o ar s e ad j u s t m e n t w h i l e d a c b p r o v i d es t h e f i ne ad j u st m e n t . v a r y in g th e ra ti o o f r 1 a n d r 2 c h a n g e s t h e r e la ti v e e f f e ct o f th e coa r se a nd f i ne a d j u st m e n t s. w i t h t h e r e sisto r va l u es a nd ex ter n a l r e fer e n c e sh o w n, t h e o u t p ut am plif ier has un i t y ga in fo r t h e d a c a o u t p u t , th us t h e o u t p u t ra n g e is 0 v t o 2.5 v ? 1 ls b . f o r d a c b t h e a m plif ier has a ga in o f 7.6 10 C3 , g i vin g d a c b a ra n g e eq ual t o 19 mv . t h e c i rc u i t i s s h o w n w i t h a 2 . 5 v re f e re nc e, but re f e re nc e v o l t a g es u p t o v dd ma y b e us e d . the o p a m ps indic a te d wi l l allo w a ra il- t o- ra il o u t p u t sw i n g. 03756- a- 039 1 f refin v dd gnd v out b 0.1 f 10 f v dd = 5v vout v in gnd ext ref ad820/ op295 5v r3 51.2k ? r4 390 ? ad780/ref192/adr391 with v dd = 5v v out a r1 390 ? r2 51.2k ? v out ad5337 / ad5338 / ad5339 * *additional pins omitted for clarity f i gur e 4 0 . c o a r se/ f i n e a d justment po wer suppl y dec o upling i n a n y ci r c ui t wh e r e ac cu ra c y is im p o r t a n t , ca r e f u l c o n s id e r a t i o n of t h e p o we r sup p ly and g r ou nd re t u r n l a you t hel p s to e n su re t h e r a te d p e r f o r ma n c e. t h e p r i n te d cir c ui t b o ar d o n w h ich t h e ad5337/ad53 38/ad5339 is m o u n t e d sh o u l d b e desig n e d s o t h a t t h e ana l o g a nd d i g i t a l s e c t i o n s a r e s e p a r a te d an d co nf i n e d t o cer t a i n a r eas o f th e bo a r d . i f th e ad5337 /ad5338/ad5339 i s in a sys t em wh er e m u l t i p le d e vices r e q u ir e a n a g nd-t o- d g n d c o n n e c t i on , t h e c o n n e c t i on s h ou l d b e m a d e at on e p o i n t on ly . t h e st ar g r ou n d p o i n t s h ou l d b e e s t a bl i s he d a s cl o s e as p o s s i b le t o t h e de vic e . th e ad5337/ad5338/ad5339 s h o u l d ha v e am p l e s u p p l y b y p a s s in g o f 10 f in p a ral l el wi th 0.1 f o n t h e s u p p l y lo ca te d as clos e t o t h e p a cka g e as p o s s i b le, ide a l l y r i g h t up ag ai n s t t h e d e v i c e . t h e 1 0 f c a p a c i tors are t h e t a n t a l u m bead typ e . the 0.1 f ca p a ci t o r s h o u l d ha ve lo w ef f e c t i v e s e r i es r e sis t a n ce (es r ) a n d lo w ef f e c t i v e ser i es ind u c t a n ce (es i ) t o pro v i d e a l o w i m p e d a nc e p a t h to g r ou nd a t h i g h f r e q u e nc i e s to ha ndle t r a n sie n t c u r r en ts d u e to in t e r n a l l o gi c sw i t c h i n g. t h e p o w e r s u p p l y l i n e s o f th e a d 5 3 3 7 / a d 5 3 3 8 / ad5339 s h o u l d us e as la rge a t r ace as p o ssi b le t o p r o v i d e lo w i m p e dan c e p a t h s and r e d u ce t h e ef fe c t s o f g l i t ch es o n t h e p o w e r s u p p l y lin e . f a st swi t c h in g sig n al s s u c h as c l o c ks s h o u l d be s h ie l d e d wi th dig i tal g r ou nd to a v oi d r a d i a t i n g noi s e to ot he r p a r t s of t h e b o ard, a n d t h e y s h ou l d n e v e r b e r u n ne ar t h e re fe re nc e i n put s . a g r ou nd line r o u t e d b e t w e e n t h e sd a and scl li n e s hel p s to r e d u ce cr osst a l k b e tw e e n t h e m . this is n o t r e q u ir e d on a m u l t i l a y er b o a r d b e c a us e t h er e is a s e p a ra te g r o u n d plan e , b u t s e p a ra t i n g th e lin e s d o es h e l p . a v o i d cr os s o ver o f d i gi t a l a n d a n alog signals. t r aces o n o p posi t e sides o f the bo ar d sh o u ld r u n a t r i g h t a n g l es t o e a c h o t h e r . this re d u c e s t h e e f f e c t s of f e e d t h rou g h t h rou g h t h e b o ard. u s i n g a micr os t r i p t e chniq u e is t h e b e s t s o l u t i o n , b u t i t s us e is n o t a l wa ys p o ss i b le wi t h a doub le-si d e d b o a r d . i n t h is t e chni q u e , t h e co m p on e n t side o f t h e b o a r d is de dic a te d to g r o u n d plane, w h i l e sig n al t r aces a r e place d on t h e s o lder si de .
ad5337/ad5338/ad5339 rev. a | page 22 of 24 table 9. overview of all ad53xx serial devices part no. resolution no. of dacs dnl interface settling time package pins singles ad5300 8 1 0.25 spi 4 s sot-23, msop 6, 8 ad5310 10 1 0.50 spi 6 s sot-23, msop 6, 8 ad5320 12 1 1.00 spi 8 s sot-23, msop 6, 8 ad5301 8 1 0.25 2-wire 6 s sot-23, msop 6, 8 ad5311 10 1 0.50 2-wire 7 s sot-23, msop 6, 8 ad5321 12 1 1.00 2-wire 8 s sot-23, msop 6, 8 duals ad5302 8 2 0.25 spi 6 s msop 8 ad5312 10 2 0.50 spi 7 s msop 8 ad5322 12 2 1.00 spi 8 s msop 8 ad5303 8 2 0.25 spi 6 s tssop 16 ad5313 10 2 0.50 spi 7 s tssop 16 ad5323 12 2 1.00 spi 8 s tssop 16 ad5337 8 2 0.25 2-wire 6 s msop 8 ad5338 10 2 0.50 2-wire 7 s msop 8 ad5338-1 10 2 0.50 2-wire 7 s msop 8 ad5339 12 2 1.00 2-wire 8 s msop 8 quads ad5304 8 4 0.25 spi 6 s msop 10 ad5314 10 4 0.50 spi 7 s msop 10 ad5324 12 4 1.00 spi 8 s msop 10 ad5305 8 4 0.25 2-wire 6 s msop 10 ad5315 10 4 0.50 2-wire 7 s msop 10 ad5325 12 4 1.00 2-wire 8 s msop 10 ad5306 8 4 0.25 2-wire 6 s tssop 16 ad5316 10 4 0.50 2-wire 7 s tssop 16 ad5326 12 4 1.00 2-wire 8 s tssop 16 ad5307 8 4 0.25 spi 6 s tssop 16 ad5317 10 4 0.50 spi 7 s tssop 16 ad5327 12 4 1.00 spi 8 s tssop 16 octals ad5308 8 8 0.25 spi 6 s tssop 16 ad5318 10 8 0.50 spi 7 s tssop 16 ad5328 12 8 1.00 spi 8 s tssop 16 visit our website at www.analog.com/support/standard_linear/selection_guides/ad53xx.htm
ad5337/ad5338/ad5339 rev. a | page 23 of 24 table 10. overview of ad53xx parallel devices part no. resolution dnl v ref pins settling time additional pin functions package pins singles buf gain hben clr ad5330 8 0.25 1 6 s tssop 20 ad5331 10 0.50 1 7 s tssop 20 ad5340 12 1.00 1 8 s tssop 24 ad5341 12 1.00 1 8 s tssop 20 duals ad5332 8 0.25 2 6 s tssop 20 ad5333 10 0.50 2 7 s tssop 24 ad5342 12 1.00 2 8 s tssop 28 ad5343 12 1.00 1 8 s tssop 20 quads ad5334 8 0.25 2 6 s tssop 24 ad5335 10 0.50 2 7 s tssop 24 ad5336 10 0.50 4 7 s tssop 28 ad5344 12 1.00 4 8 s tssop 28 octals ad5346 8 0.25 4 6 s tssop lfcsp 38, 40 ad5347 10 0.50 4 7 s tssop 38, 40 ad5348 12 1.00 4 8 s tssop 38, 40
ad5337/ad5338/ad 5339 rev. a | page 24 of 24 outline dimensions 0.80 0.60 0.40 8 0 4 85 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc coplanarity 0.10 0.23 0.08 compliant to jedec standards mo-187aa f i g u re 41. 8-l e ad m i ni s m al l o u t l ine p a ck ag e [m sop ] (rm-8) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge package desc ri p t i o n p a c k a g e o p t i o n b r a n d i n g ad5337arm ?40c to +105c 8-lead msop rm-8 d23 ad5337arm- r e el7 ?40c to +105c 8-lead msop rm-8 d23 ad5337brm ?40c to +105c 8-lead msop rm-8 d20 ad5337brm-re el ?40c to +105c 8-lead msop rm-8 d20 ad5337brm-re el7 ?40c to +105c 8-lead msop rm-8 d20 ad5338arm ?40c to +105c 8-lead msop rm-8 d24 ad5338arm- r e el7 ?40c to +105c 8-lead msop rm-8 d24 ad5338brm ?40c to +105c 8-lead msop rm-8 d21 ad5338brm-re el ?40c to +105c 8-lead msop rm-8 d21 ad5338brm-re el7 ?40c to +105c 8-lead msop rm-8 d21 ad5338armz-1 ?40c to +105c 8-lead msop rm-8 d5g ad5338armz-1 r eel7 ?40c to +105 c 8-lead msop rm-8 d5g AD5338BRMZ-1 ?40c to +105c 8-lead msop rm-8 d5j AD5338BRMZ-1 r eel7 ?40c to +105 c 8-lead msop rm-8 d5j ad5339arm ?40c to +105c 8-lead msop rm-8 d25 ad5339arm- r e el7 ?40c to +105c 8-lead msop rm-8 d25 ad5339brm ?40c to +105c 8-lead msop rm-8 d22 ad5339brm-re el ?40c to +105c 8-lead msop rm-8 d22 ad5339brm-re el7 ?40c to +105c 8-lead msop rm-8 d22 purch a se of li c e n s e d i2 c c o m p on en t s o f an a l og d e vi ces or on e of i t s subli c en s e d as soci a t ed c o m p a n i e s con v eys a li cen s e for t h e purch a ser un der t h e ph i l i p s i2 c pa t e n t rights to us e the s e co mpo n e nts in an i2c s y s t e m , pro v ided that the s y s t e m co nf o r ms to the i2c s t and a rd s p e c i f icatio n as d e f i ned by phil ips . ? 2004 a n alo g d e vices, inc. all rig h t s reserv ed. tra d em arks an d registered tra d ema r ks are the proper ty o f th eir respectiv e o w n e rs . d03756-0-10/0 4(a)

▲Up To Search▲

Price & Availability of AD5338BRMZ-1

	To Download AD5338BRMZ-1 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .